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BinaryAnalysisPlatform · Jul 12, 2023 · 8786196 · 8786196
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commit 8786196
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Showing 13 changed files with 482 additions and 106 deletions.
diff --git a/buildlog.txt b/buildlog.txt
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
@@ -80,6 +80,9 @@ this code that are retained.
 #ifndef SOFTFLOAT_TYPES_H
 #define SOFTFLOAT_TYPES_H
 
+#include <stdint.h>
+#include <stdbool.h>
+
 /*
  * Software IEC/IEEE floating-point types.
  */

diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
@@ -95,6 +95,7 @@ typedef enum {
 
 #include "fpu/softfloat-types.h"
 #include "fpu/softfloat-helpers.h"
+#include <stdbool.h>
 
 /*----------------------------------------------------------------------------
 | Routine to raise any or all of the software IEC/IEEE floating-point

diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
@@ -1,6 +1,7 @@
 #ifndef BSWAP_H
 #define BSWAP_H
 
+#include "osdep.h"
 #ifdef CONFIG_MACHINE_BSWAP_H
 # include <sys/endian.h>
 # include <machine/bswap.h>

diff --git a/linux-user/mips/trace_info.h b/linux-user/mips/trace_info.h
@@ -1,11 +1,7 @@
 #pragma once
 
 #include "frame_arch.h"
+#include <stdint.h>
 
-#if defined(TARGET_MIPS)
 const uint64_t frame_arch = frame_arch_mips;
 const uint64_t frame_mach = frame_mach_mipsisa32;
-#else
-const uint64_t frame_arch = frame_arch_mips64;
-const uint64_t frame_mach = frame_mach_mipsisa64;
-#endif
diff --git a/linux-user/mips64/trace_info.h b/linux-user/mips64/trace_info.h
@@ -0,0 +1,7 @@
+#pragma once
+
+#include "frame_arch.h"
+#include <stdint.h>
+
+const uint64_t frame_arch = frame_arch_mips;
+const uint64_t frame_mach = frame_mach_mipsisa64;
diff --git a/qobject/block-qdict.c b/qobject/block-qdict.c
@@ -226,8 +226,8 @@ void qdict_array_split(QDict *src, QList **dst)
         bool is_subqdict;
         QDict *subqdict = NULL;
         char indexstr[32], prefix[32];
-        size_t snprintf_ret;
 
+        size_t snprintf_ret;
         snprintf_ret = snprintf(indexstr, 32, "%u", i);
         assert(snprintf_ret < 32);
 

diff --git a/stubs/replay-tools.c b/stubs/replay-tools.c
@@ -7,13 +7,13 @@ bool replay_events_enabled(void)
     return false;
 }
 
-int64_t replay_save_clock(unsigned int kind, int64_t clock, int64_t raw_icount)
+int64_t replay_save_clock(ReplayClockKind kind, int64_t clock, int64_t raw_icount)
 {
     abort();
     return 0;
 }
 
-int64_t replay_read_clock(unsigned int kind, int64_t raw_icount)
+int64_t replay_read_clock(ReplayClockKind kind, int64_t raw_icount)
 {
     abort();
     return 0;

diff --git a/target/mips/helper.h b/target/mips/helper.h
@@ -1,4 +1,4 @@
-DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int)
+DEF_HELPER_3(raise_exception_err, noreturn, env, i32, i32)
 DEF_HELPER_2(raise_exception, noreturn, env, i32)
 DEF_HELPER_1(raise_exception_debug, noreturn, env)
 
@@ -17,17 +17,28 @@ DEF_HELPER_3(lld, tl, env, tl, int)
 #endif
 
 #ifdef HAS_TRACEWRAP
-DEF_HELPER_1(trace_newframe, void, tl)
-DEF_HELPER_3(trace_endframe, void, env, tl, i32)
+// trace being/end
+DEF_HELPER_1(trace_newframe, void, i64)
+DEF_HELPER_2(trace_endframe, void, env, i64)
+DEF_HELPER_1(trace_mode, void, ptr)
+
+// load/store registers
 DEF_HELPER_2(trace_load_reg32, void, i32, i32)
 DEF_HELPER_2(trace_store_reg32, void, i32, i32)
-DEF_HELPER_3(trace_load_mem32, void, env, i32, i32)
-DEF_HELPER_3(trace_store_mem32, void, env, i32, i32)
+
+// load store memory operands
+DEF_HELPER_3(trace_load_mem, void, i32, i32, i32)
+DEF_HELPER_3(trace_store_mem, void, i32, i32, i32)
+DEF_HELPER_3(trace_load_mem_i64, void, i32, i64, i32)
+DEF_HELPER_3(trace_store_mem_i64, void, i32, i64, i32)
 #ifdef TARGET_MIPS64
+// load/store registers
 DEF_HELPER_2(trace_load_reg64, void, i32, i64)
 DEF_HELPER_2(trace_store_reg64, void, i32, i64)
-DEF_HELPER_2(trace_load_mem64, void, i32, i64)
-DEF_HELPER_2(trace_store_mem64, void, i32, i64)
+
+// load store memory operands
+DEF_HELPER_3(trace_load_mem64, void, i64, i64, i32)
+DEF_HELPER_3(trace_store_mem64, void, i64, i64, i32)
 #endif // TARGET_MIPS64
 #endif // HAS_TRACEWRAP
 

diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c
@@ -43,7 +43,7 @@ target_ulong exception_resume_pc(CPUMIPSState *env)
 }
 
 void helper_raise_exception_err(CPUMIPSState *env, uint32_t exception,
-                                int error_code)
+                                uint32_t error_code)
 {
     do_raise_exception_err(env, exception, error_code, 0);
 }

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
@@ -1234,21 +1234,21 @@ static const char regnames_LO[][4] = {
 static inline void gen_trace_newframe(uint64_t pc) {
 #ifdef HAS_TRACEWRAP
 
-    // create new traceframe
+    // will contain machine type information
     TCGv_i64 _pc = tcg_const_i64(pc);
     gen_helper_trace_newframe(_pc);
     tcg_temp_free_i64(_pc);
 
-    // get machine type
+    TCGv_ptr mt;
 #ifdef TARGET_MIPS64
-    TCGv_ptr mt = tcg_const_ptr(FRAME_MODE_MIPS64); // TODO: Check this
-#else
-    TCGv_ptr mt = tcg_const_ptr(FRAME_MODE_MIPS);
+    mt = tcg_const_ptr(FRAME_MODE_MIPS64);
+#else // else this is TARGET_MIPS
+    mt = tcg_const_ptr(FRAME_MODE_MIPS);
 #endif // TARGET_MIPS64
 
     // set trace mode to mips64 or mips
     gen_helper_trace_mode(mt);
-    tcg_trace_free_ptr(mt);
+    tcg_temp_free_ptr(mt);
 
 #endif // HAS_TRACEWRAP
 }
@@ -1269,7 +1269,7 @@ static void gen_trace_load_reg(int reg, TCGv var) {
 #ifdef TARGET_MIPS64
     gen_helper_trace_load_reg64(r, var);
 #else
-    gen_helper_trace_load_reg(r, var);
+    gen_helper_trace_load_reg32(r, var);
 #endif
     tcg_temp_free_i32(r);
 
@@ -1280,16 +1280,43 @@ static void gen_trace_store_reg(int reg, TCGv var) {
 #ifdef HAS_TRACEWRAP
 
     TCGv_i32 r = tcg_const_i32(reg);
-#ifdef TARGET_PPC64
+#ifdef TARGET_MIPS64
     gen_helper_trace_store_reg64(r, var);
 #else
-    gen_helper_trace_store_reg(r, var);
+    gen_helper_trace_store_reg32(r, var);
 #endif
     tcg_temp_free_i32(r);
 
 #endif // HAS_TRACEWRAP
 }
 
+static void gen_trace_load_mem(TCGv addr, TCGv val, MemOp op) {
+#ifdef HAS_TRACEWRAP
+
+    TCGv_i32 o = tcg_const_i32(op);
+#ifdef TARGET_MIPS64
+    gen_helper_trace_load_mem64(addr, val, o);
+#else
+    gen_helper_trace_load_mem(addr, val, o);
+#endif
+    tcg_temp_free_i32(o);
+
+#endif // HAS_TRACEWRAP
+}
+
+static void gen_trace_store_mem(TCGv addr, TCGv val, MemOp op) {
+#ifdef HAS_TRACEWRAP
+
+    TCGv_i32 o = tcg_const_i32(op);
+#ifdef TARGET_MIPS64
+    gen_helper_trace_store_mem64(addr, val, o);
+#else
+    gen_helper_trace_store_mem(addr, val, o);
+#endif
+    tcg_temp_free_i32(o);
+
+#endif // HAS_TRACEWRAP
+}
 
 /* General purpose registers moves. */
 void gen_load_gpr(TCGv t, int reg)
@@ -1321,9 +1348,7 @@ void gen_load_gpr_hi(TCGv_i64 t, int reg)
         tcg_gen_mov_i64(t, cpu_gpr_hi[reg]);
     }
 
-    #ifdef HAS_TRACEWRAP
     gen_trace_load_reg(reg, t);
-    #endif
 }
 
 void gen_store_gpr_hi(TCGv_i64 t, int reg)
@@ -1332,9 +1357,7 @@ void gen_store_gpr_hi(TCGv_i64 t, int reg)
         tcg_gen_mov_i64(cpu_gpr_hi[reg], t);
     }
 
-    #ifdef HAS_TRACEWRAP
     gen_trace_store_reg(reg, t);
-    #endif
 }
 #endif /* TARGET_MIPS64 */
 
@@ -1363,8 +1386,6 @@ static inline void gen_load_srsgpr(int from, int to)
     }
     gen_store_gpr(t0, to);
     tcg_temp_free(t0);
-
-    #ifdef H
 }
 
 static inline void gen_store_srsgpr(int from, int to)
@@ -16116,7 +16137,7 @@ static void mips_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
     int is_slot;
 
     // get pc_next and start generating new traceframe
-    uint64_t pc_next = ctx->base.px_next;
+    uint64_t pc_next = ctx->base.pc_next;
     gen_trace_newframe(pc_next);
 
     // translate depending on architecture
@@ -16182,7 +16203,7 @@ static void mips_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
     }
 
     // end the frame
-    gen_pc_endframe(pc_next);
+    gen_trace_endframe(pc_next);
 }
 
 static void mips_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)